A survey on design quality estimation for embedded systems

This paper is a brief survey on hw/sw codesign, its present features and its possible future developments. It is beyond the scope of this article to give a full explanation of all the steps that lead to a complete design. We will, instead, focus our attention on that set of evaluation criteria used to estimate the eeciency of a design in terms of time to market, cost, power consumption, area occupation and other design constraints. 1 The need for an integrated development environment The great advance in microelectronic technology in the last decade has permitted to increase enormously the number of devices integrated on a single chip. The drawback of the growth of on-chip transistors number has been the growth of the design complexity itself. As a result neither a single designer or a design team could be able to complete the design cycle in a reasonable time. This lead the researchers involved in this area to change drastically the design style and techniques introducing software tools, well known as CAD tools, intended to help the designer to carry out his task as soon and as eeciently as possible. A CAD tool is roughly divided into three parts: a schematic editor, that is a tool by which the designer speciies, at diierent levels of abstraction (i.e. transistor level, gate level, functional block level), the circuit functionalities; a time analyzer and a test pattern generator for debugging circuit and evaluating its performances; a silicon compiler, that is a tool that capture the schematic view, translate it into a layout and maps it into silicon according to the target technology. A graphic schematic is not the only way to specify the circuit functionality, ad-hoc languages,known as HDLs, have been developed as well. These languages allow a circuit description by means of a highly-specialized instruction set. Several CAD tools have been developed, but what the designers and scientiic community still did not think about, was a set of rules to make more eecient and faster the design. The need of a general and eecient design methodology is even much stronger in the area of special purpose applications in which the designer must skim among several possible architectures and decide which tasks will be carried out by hardware and which ones by software routines without knowing a-priori which solution better matches the design constraints. Furthermore the exigencies of the market must be satissed: the …